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AES-128
1.0
Fully Unrolled VHDL Implementation of AES-128
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AES MixColumn operation (single column) More...
Entities | |
| Behavioral | architecture |
| Behavioral architecture of the "MixColumn" function. More... | |
Libraries | |
| ieee | |
| work | |
Use Clauses | |
| ieee.std_logic_1164.all | |
| work.aes128Pkg.all | |
Ports | |
| In_DI | in Word |
| Input to the "MixColumn" function. | |
| Out_DO | out Word |
| Output of the "MixColumn" function. | |
AES MixColumn operation (single column)
The present design implements the MixColumn operation of the Advanced Encryption Standard (AES).