The present design implements the S-box of the Advanced Encryption Standard (AES). Since the overall AES structure is based on a byte-oriented design, also the S-box hast been implemented such that a single byte can be substituted. This S-box was realized using a “straight-forward” approach using a LUT based on an array of constants. Thereby shifting all the “effort” of the actual architecture over to the synthesizer.
General Information
| File | sbox.svh |
| Title | AES S-box |
| Project | VLSI Book AES-128 Example |
| Author | Michael Muehlberghuber (mb.nosp@m.gh@iis.ee..nosp@m.ethz.ch) |
| Company | Integrated Systems Laboratory, ETH Zurich |
| Copyright | Copyright © 2014 Integrated Systems Laboratory, ETH Zurich |
| File Created | 2014-10-16 |
| Last Updated | 2014-10-16 |
| Platform | Simulation=QuestaSim; Synthesis=Synopsys |
| Standard | SystemVerilog 1800-2009 |
Revision Control System Information
| File ID | $Id: sbox.sv 23 2014-10-20 09:23:20Z u59323933 $ |
| Revision | $Revision: 23 $ |
| Local Date | $Date: 2014-10-20 11:23:20 +0200 (Mon, 20 Oct 2014) $ |
| Modified By | $Author: u59323933 $ |
Major Revisions
| 2014-10-16 (v1.0) | Created (mbgh) |
Summary
| sbox | The present design implements the S-box of the Advanced Encryption Standard (AES). |
| Ports | |
| In_DI | One byte input to the S-box. |
| Out_DO | One byte output from the S-box. |