AES-128
1.0
Fully Unrolled VHDL Implementation of AES-128
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Behavioral architecture of AES-128. More...
Functions | |
Matrix | conv_matrix ( input: in std_logic_vector (127 downto 0) ) |
std_logic_vector | conv_std_logic_vector ( input: in Matrix ) |
Processes | |
pComb_CalcAllCipherStatesDisabled | ( EnCipherState_SP ) |
pSequ_FlipFlops | ( Clk_CI , Reset_RBI ) |
Components | |
keyExpansion | <Entity keyExpansion> |
cipherRound | <Entity cipherRound> |
subMatrix | <Entity subMatrix> |
Types | |
stateArrayType | array ( 0 to 9 ) of Matrix |
Signals | |
Plaintext_DN | std_logic_vector ( 127 downto 0 ) |
Plaintext_DP | std_logic_vector ( 127 downto 0 ) |
CipherState_DN | stateArrayType |
CipherState_DP | stateArrayType |
Ciphertext_DN | Matrix |
Ciphertext_DP | Matrix |
EnCipherState_SN | unsigned ( 0 to 10 ) |
EnCipherState_SP | unsigned ( 0 to 10 ) |
Roundkeys_D | roundkeyArrayType |
LastSubMatrixOut_D | Matrix |
KeyExpStart_S | std_logic |
AllCipherStatesDisabled_S | std_logic |
Instantiations | |
keyexpansion_1 | keyExpansion <Entity keyExpansion> |
lastsubmatrix | subMatrix <Entity subMatrix> |
cipherrounds | cipherRound <Entity cipherRound> |
Behavioral architecture of AES-128.